CONQUER Digital Logics(1st SEM) EXAM TARGATED ! [SUJAL'S FAREWELL SPECIAL]

 

Let's conquer DL with this strategy!

 

UNIT-1       BINARY SYSTEMS 

  Read Notes according to the Syllabus: Digital Systems, Binary numbers, Number base conversion, Octal and hexadecimal numbers, compliments, Signed Binary numbers, Decimal codes (BCD, 2 4 2 1,8 4 -2 -1,Excess 3, Gray Code), Binary Storage and Registers, Binary logic 

 

IMP QUESTIONS OF UNIT 1 

 

1. 1. Perform the following operations: 

a. (011101)2 – (110011)2 using 2’s  complement 

b. (89344)10– – (98654)10 using 9’s complement. [5 Marks] [2080] 

2. 2. Carry out the following task 

1. a. Preform 1’s complement subtraction 110101 – 100101 

2. b. Represent decimal number 0.125 into its binary form [5 Marks] [2078] 

3. 
   

3. 3. List two major characteristics of digital computer. Represent -6 (negative six) 8 bits in signed magnitude, signed 1’s complement and signed 2’s complement respectively. Represent decimal number 4673 in 

1. octal and  BCD [10 Marks] [2077] 

2. 
   

4. 4. Convert the following decimal numbers to the indicated bases. 

1. a. 7562.45 to octal 

2. b. 1938.257 to hexadecimal 

3. c. 175.175 to binary [5 Marks] [2075] 

4. 
   

5. 5. Perform the arithmetic operation (+42)+(-13) and (-42)-(-13) in binary using the signed -2’s-complement representation for negative numbers. [5 Marks] [2074] 

6. 
   

6. 6. Convert (2AC5)16 to decimal, octal and binary. [5 Marks] [Model Set] 

7. 
   

7. 7. Perform the following conversions: 

1. a. (672.45)8 = (?)16 

2. b. (101010110010)2 = (?)GRAY 

3. 
   

3. 8. If (123)x = (231)5 , find the value of x ? [5 Marks] [1st term] 

4. 
   

8. 9. Perform the following operations: 

1. a. (011101)2 - (110011)2 using 2’s compliment. 

2. b. (89344)10 - (98654)10 using 9’s compliment. [5 Marks] [QT] 

3. 
   

9. 10. What is reflected code? explain about alphanumeric code with example ? [5 Marks] 

10. 
    

10. 11. Differentiate between analog and digital systems? [5 Marks] [1st term] 

 

UNIT-2       BOOLEAN ALGEBRA AND LOGIC GATES 

  Read Notes according to the Syllabus: Basic and Axiomatic definitions of Boolean algebra, Basic Theorems and properties of Boolean Algebra, Boolean Functions, Logic Operations, Logic Gates, Integrated Circuits 

 

IMP QUESTIONS OF UNIT 2 

 

1. 1. What is an integrated circuit? Explain different types of IC and levels of integration as well. [5 Marks] 

2. 
   

2. 2. what is the digital logic family? list of them and explain propagation delay and power dissipation. [5 Marks] 

3. 
   

3. 3. what do you mean by universal gate ?realize the xor gate using nor gate? [5 Marks] 

4. 
   

4. 4. state and prove de morgan theorem first and second with logic gate and truth table.  [5 Marks]

5. 
   

5. 5. Write short notes on (Any Two) 

1. a. Negative Logic 

2. b. CMOS 

3. c. EBCDIC [5 Marks] [2078] 

4. 
   

6. 5. Where is CMOS suitable to use? Define Power dissipation. Show that the positive logic NAND gate is a negative logic NOR gate and vice versa. [5 Marks] [2077] 

7. 
   

7. 6. Write short notes on any two: 

1. a. SIMM 

2. b. RTL 

3. c. Parity Checker [5 Marks] [2075] 

 

UNIT-3       SIMPLIFICATIONS OF BOOLEAN FUNCTIONS 

  Read Notes according to the Syllabus: K-map, Two and Three variable maps, Four variable maps, product of sum simplification, NAND and NOR implementation, Don't Care conditions, Determinant and selection of Prime Implicants 

 

IMP QUESTIONS OF UNIT 3 

1. 1. Simplify the Boolean function and draw logic circuit for the resulting function 

1. a. f=x’yz+x’yz’+xy’z’+xy’z 

2. b. f=x’y+x’y’z’+xyz’+x’yz [5 Marks] 

3. 
   

2. 2. Minimize the Boolean function Boolean function using K-map 

1. F(A, B, C, D) = Σ(0, 1, 3, 5, 7, 8, 9, 11, 13, 15) [5 Marks] [2078] 

2. 
   

3. 3. Express the Boolean function F = x + yz as product of max-terms. [5 Marks] [2078] 

4. 
   

4. 4. Simplify the following function and implement them with two level NOR gate circuit, F(w, x, y, z) = wx’ + y’z’ + w’yz’ [5 Marks] [2077] 

5. 
   

5. 5. Reduce the following function using k-map F = B’D + A’BC’ + AB’C + ABC’ [5 Marks] [2075] 

6. 
   

6. 6. Express the Boolean Function F = A + B’ C in a sum of min terms . [5 Marks] [2075] 

7. 
   

7. 7. Write Short notes on (Any two) 

1. a. RTL 

2. b. State Reduction 

3. c. POS [5 Marks] [2077] 

4. 
   

8. 8. Minimize the Boolean function using K-map 

1. F(A, B, C, D) = Σ (0, 2, 3, 6, 7, 8, 9, 10, 13, 15) [5 Marks] [1st term] 

2. 
   

9. 9. Use K-Map to simplify the given function in POS. Implement the simplified function using 2- input NOR-NOR gate only. 

F = Π M (0, 1, 2, 9, 10, 11, 14) 

D = Π M (7, 8, 12) 

And with don’t care conditions [5 Marks] [Model Set] 

10. 10. Describe the three variable k-map with example. [5 Marks] 

 

 

UNIT-4       COMBINATIONAL LOGIC [VERY IMP CHAPTER] 

  Read Notes according to the Syllabus: Design Procedure, Adders, Subtractors, Code Conversions, Analysis Procedure, Multilevel NAND and NOR Circuits, Exclusive-OR Circuits 

 

IMP QUESTIONS OF UNIT 4 

1. 1. Write short notes on: 

1. a. State Diagram 

2. b. Encoder 

3. c. Parallel Adder [5 Marks] [2080] 

4. 
   

2. 2. Design a full subtractor with necessary tables and logic diagram. [5 Marks] [2080] 

3. 
   

3. 3. If f(P,Q,R,S) = ∑(3,4,7,8,14) and d(P,Q,R,S) = ∑(1,6,9,13). Simplify using K-map and design the circuit using minimum number of NAND gates. [5 Marks] [2080, QT] 

4. 
   

4. 4. What is combinational circuit? Design a combinational circuit with four inputs that represent a decimal digit in BCD and four output lines that generate the 1’s complement of the input binary patterns. [10 Marks] [2080] 

5. 
   

5. 5. What is combinational logic? what is its important features? [5 Marks] 

6. 
   

6. 6. Design a combinational circuit with three inputs and one output. The output is 1 when the binary value of the inputs is an odd number. [5 Marks] [2078] 

7. 
   

7. 7. Derive the Boolean expression for sum and carry of half adder. Draw its combinational circuit. Implement it using only NAND gates. [5 Marks] 

8. 
   

8. 8. Design a combinational circuit with three inputs and six outputs. The output binary number should be the square of the input binary number. [5 Marks] 

9. 
   

9. 9. Reduce the following function using k-map F = wxy + yz + xy’z + x’y [5 Marks] 

10. 
    

10. 10. Express the complement of the following function in sum of min-terms. 

1. F(A, B, C, D) = Σ(0, 2, 6, 11, 13, 14) [5 Marks] 

2. 
   

11. 11. Design a combinational circuit with three inputs, x, y, and z, and three outputs, A, B, and C. When the binary input is 0, 1, 2, or 3, the binary output is one greater than the input. When the binary input is 4, 5, 6, or 7, the binary output is one less than the input. [5 Marks] 

12. 
    

12. 12. Design a full subtractor circuit with three inputs x, y, Bin𝐵𝑖𝑛 and two outputs Diff and Bout𝐵𝑜𝑢𝑡· The circuit subtracts x−y−Bin𝑥−𝑦−𝐵𝑖𝑛., where Bin𝐵𝑖𝑛 is the input borrow, Bout𝐵𝑜𝑢𝑡 is the output borrow, and Diff is the difference. [5 Marks] 

13. 
    

13. 13. Simplify the following function and implement them with two level NOR gate circuit, F(w,  x,  y,  z) = wx’ + y’z’ + w’yz’. [5 Marks] 

14. 
    

14. 14. Where is CMOS suitable to use? Define Power dissipation. Show that the positive logic NAND gate is a negative logic NOR gate and vice versa. [5 Marks] 

15. 
    

15. 15. Design a combinational circuit that generates 9’s complement of a BCD number. [5 Marks] 

16. 
    

16. 16. Design a combinational circuit that would convert BCD to seven segment led. [5 Marks] [1st term] 

17. 
    

17. 17. What is combinational circuit? Design a combinational circuit with four inputs that represent a 2421 code four output lines that generate the BCD of the input binary patterns. [10 Marks] [QT] 

18. 
    

18. 18. Design a combinational circuit that multiplies 2-bit numbers, a1a0 and b1b0 to produce a 4-bit product c3c2c1c0. Use AND gates and half-adders. [5 Marks] [Model Set] 

19. 
    

19. 19. Design a circuit which produces 2’s compliment of the given four bit binary digit. [5 Marks] [Model Set] 

 

 

UNIT-5       COMBINATIONAL LOGIC WITH MSI AND LSI 

  Read Notes according to the Syllabus: Binary Parallel Adder and Subtractor, Decimal Adder, Magnitude Comparator, Decoders and Encoders, Multiplexers, Read-only-Memory (ROM), Programmable Logic Array (PLA), Programmable Array Logic (PAL) 

 

 

IMP QUESTIONS OF UNIT 5 

1. 1. Implement the Boolean function F(P,Q,R,S) = ∑ (3,4,6,8,9,14) using: 

1. a. 8 to 1 multiplexer 

2. b. PLA 

3. c. Decoder [10 Marks] [2080] 

2. Implement the Boolean function F(P,Q,R,S) = ∑(3, 4, 6, 8, 9, 14) using: 

a. 8 to 1 Multiplexer 

2. b. PLA 

3. c. Decoder 

4. d. ROM 

5. e. PAL [10 Marks] [QT] 

2. 3. Implement F = Σ(0, 2, 3, 4, 7) using 

1. a. Multiplexer 

2. b. Decoder 

3. c. PLA [10 Marks] [2078] 

4. 
   

3. 4. Design a circuit that produces the square of 3-bit number using ROM? [5 Marks] [Model Set] 

4. 
   

4. 5. Implement full adder using decoder. [5 Marks] [Model Set] 

5. 
   

5. 6. What do you mean by encoder? Design 3 to 8 line encoder. [5 Marks] [Model Set] 

6. 
   

6. 7. Differentiate between PLA and PAL. Explain 4-bit magnitude comparator. [5 Marks] 

7. 
   

7. 8. Design and explain the Decimal adder with truth table and suitable diagram. [5 Marks] 

8. 
   

8. 9. Design a 5 x 32 decoder with four 3 x 8 decoder with enable and one  2 x 4 decoder. Use block diagrams only. [5 Marks] 

9. 
   

9. 10. Draw a block diagram, truth table and logic circuit of 1*16 Demultiplexer and explain its working principle. [5 Marks] 

10. 
    

10. 11. Implement the following Functions F= Σ (0,3,5,6,7) using 

1. a. Decoder 

2. b. Multiplexer 

3. c. PLA [10 Marks] 

4. 
   

11. 12. Design the priority encoder circuit. [5 Marks] 

12. 
    

12. 13. Implement half adder using 2-4 decoder. [5 Marks] 

13. 
    

13. 14. The following is a truth table of a 3-input,4 output combinational circuit. Tabulate the PAL programming table for the circuit and mark for the circuit and mark the fuses to be blown in a PAL diagram. 

Input			Output
X	Y	Z	A	B	C	D
0	0	0	0	0	0	0
0	0	1	1	1	1	1
0	1	0	1	0	1	1
0	1	1	0	1	0	1
1	0	0	1	0	1	0
1	0	1	0	0	0	1
1	1	0	1	1	1	0
1	1	1	0	1	1	1

 

[10 Marks] [2075] 

 

14. 15. Implement the following function F = Σ(1, 2, 3, 4, 8) using 

1. a. Decoder 

2. b. Multiplexer 

3. c. PLA [10 Marks] 

4. 
   

16. What is the difference between a serial and parallel transfer? Explain how to convert serial data to parallel and parallel data to serial. What type of register is needed? [5 Marks] 

17. Design 4-bit even parity generator. [5 Marks] 

18. Implement the following functions using PLA 

1. w (A, B, C, D) = Σ(2, 12, 13) 

2. x (A, B, C, D) = Σ(7, 8, 9, 10, 11, 12, 13, 14, 15) 

3. y (A, B, C, D) = Σ(0, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 15) 

4. z (A, B, C, D) = Σ(1, 2, 8, 12, 13) [10 Marks] 

 

 

UNIT-6       SYNCHRONOUS AND ASYNCHRONOUS SEQUENTIAL LOGIC [VERY IMP ] 

  Read Notes according to the Syllabus: Flip-Flops, Triggering of flip-flops, Analysis of clocked sequential circuits, Design with state equations and state reduction table, Introduction to Asynchronous circuits, Circuits with latches. 

 

IMP QUESTIONS OF UNIT 6 

1. 1. Design an asynchronous mod 11 up counter using T flip flop. [5 Marks] [2080] 

2. 
   

2. 2. What is shift register? Explain 4 bit SISO and PIPO with timing diagram. [5 Marks] [2080] 

3. 
   

3. 3. What is the drawback of RS Flipflop? Explain D Flip Flop in detail with a logic diagram, characteristics table, and characteristics equation. [5 Marks] [2080] 

4. 
   

4. 4. What is asynchronous counter? Design asynchronous counter that counts the sequence of 0-1-4-6-7 using T flip-flop. [10 Marks] [2080] 

5. 
   

5. 5. Design the sequential circuit with respect to the following state diagram using J-K flip flops. [5 Marks] [2078] 

 

6. 6. Design the essential circuit with respect to the following state diagram using T flip flops.
    

[5 Marks] 

7. 7. Difference between synchronous and asynchronous counter. Design mode-7 synchronous counter using T-flip flop. Show necessary truth tables and k-maps. [10 Marks] [2078] 

8. 
   

8. 8. Write short notes on (any two): 

1. a. State diagram 

2. b. De-Morgan’s theorem 

3. c. TTL [5 Marks] 

4. 
   

9. 9. Explain master slave J-K flipflop. [5 Marks] [2074] 

10. 
    

10. 10. Differentiate between PAL and PLA. Design a counter as shown in the state diagram below. 

 

[10 Marks] [2074] 

11. 11. Design a 4-bit binary ripple counter with D flip-flops. [5 Marks] [2075] 

12. 
    

12. 12. Design clocked sequential circuit of the following state diagram by using JK flip-flop 

 

[10 Marks] 

13. 13. Explain negative-edge triggered D flip flop with necessary logic diagram and truth table. [10 Marks]

14.  

14. 14. Design sequential circuit specified by the following state diagram using T flip-flops. 

[10 Marks] 

15. 15. Difference between synchronous and asynchronous sequential circuit. Design a counter as shown in the state diagram below. [10 Marks] [Model Set] 

 

16. 16. Discuss race condition in J-K flipflop and methods to overcome it. [5 Marks] [2080, Model Set] 

17. 
    

17. 17. Explain negative-edge triggered D flipflop with necessary logic diagram and truth table. [5 Marks] [2077] 

18. 
    

18. 18. Explain Master slave J-K flipflop. [5 Marks] [2074] 

 

UNIT-7       REGISTERS AND COUNTERS 

  Read Notes according to the Syllabus: Registers, Shift registers, Ripple Counters, Synchronous Counters, Timing Sequences, The memory 

 

IMP QUESTIONS OF UNIT 7 

1. 1. Provide one example where shift right operation can be used. Explain parallel-in-parallel-out register. [5 Marks] [2078] 

2. 
   

2. 2. What are the practical implementations of up counter? Explain Binary ripple counter. [5 Marks] [2078] 

3. 
   

3. 3. Explain shift register with parallel load. Highlight on its practical implications. [5 Marks] 

4. 
   

4. 4. Illustrate the use of Binary ripple counter and BCD ripple counter. [5 Marks] 

5. 
   

5. 5. Explain different types of shift registers with necessary diagrams. [10 Marks] [Model Set] 

These were the all the previously asked questions chapterwise.

DL looks like easy sub but its a tough one if you didn't practice. Easy but many topics.

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